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[Technology Sharing] Analysis of the market trend of FPGA, vertical and horizontal integration is the main direction

On the one hand, after entering the 20nm and 14nm stages, not only the complexity of the FPGA has been improved, but also the requirement of "keeping pace with the times" for its peripheral power management chips has been put forward. On the other hand, with the development of SoC FPGA and 3D IC technology, the replacement of ASSP and ASIC by FPGA is accelerating, but more breakthroughs are needed. The biggest obstacle is the interconnection problem, which needs to be "upright and surprising" in the vertical architecture. In addition, with the increasing complexity of the FPGA system, competition is not only about product performance, but also about how to help customers simplify design and speed up the market, which requires breakthroughs in integration and design tools. To meet these challenges, the two giants of FPGA have recently taken a "different road to the same destination".

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Cross-border Acquisition Speed Up Horizontal Integration

As a complex digital processor, it is very challenging to provide current for it. In the future, the requirement of power supply accuracy for 14-nm FPGA is higher.

Six months after the announcement of the acquisition of Enpirion, Altera recently launched the first product of their marriage, introducing a reference design that combines Cyclone V SoC FPGA and Enpirion PowerSoC power supply products. Mark Davidson, marketing director of Altera Power Supply Business, said that it was very challenging to provide current to FPGA, which has become a complex digital processor with high performance analog devices. In the future, the requirement of power supply accuracy for 14-nm FPGA is higher. If the voltage range exceeds the requirement of the specification, it may cause the failure or even burnout of the FPGA. And the engineers who are engaged in the development of FPGA are generally good at the design and development of digital circuits, while the professional knowledge of analog power supply may be slightly insufficient. In order to help customers solve these challenges and simplify their design, Altera and Enpirion have developed a convenient, efficient and comprehensive power supply solution.

It is understood that because Enpirion PowerSoC DC-DC power converter integrates controllers, high-frequency power field-effect transistors and several sensors, it not only meets the dynamic performance requirements of the power supply of the FPGA, but also has many advantages in the system, such as pin layout reduction by 50%, power consumption reduction by 35%. Due to the excellent transient performance of the control loop, the use of the decoupled volume capacitor of the FPGA is reduced by 5%. 0%. It has the advantages of low noise and low ripple, and can supply power for transceiver and PLL efficiently. In addition, it also reduces the number of components, improves the reliability of the system and reduces the life cycle cost. Mark Davidson says that with this solution, the customer's design process can be reduced from 18 steps to 6 steps in the original partition, and even from 6 steps to 3 steps with PowerSoC's reference design process.

"Cyclone V SoC FPGA with Enpirion power supply kit has begun to provide, other V series products power supply kit will be provided in the first half of 2014." Mark Davidson further noted that "28nm FPGAs will use some of the original reference designs, but new power optimization systems like 20nm and 14nm FPGAs will be used."

As to whether Enpirion's future products only support Altera's FPGA products after being acquired, Mark Davidson made it clear that as an independent department, Enpirion's power products after joining Altera will still support customers other than Altera, and its subsequent product development is not limited to supporting only the FPGA products.

Seeking common ground while reserving differences through vertical innovation

The Virtex VU440 Ultra Scale device launched by Sellings doubles the capacity of the industry's largest devices to 4.4 million logical units.

And Sallings takes the path of vertical innovation. Following the announcement of the first 20-nm device in the industry in July 2013, it was also announced that the 20-nm Al Programmable device will adopt the industry's first ASIC-level architecture UlstraScale, thus expanding its application to tens of billions of dollars in ASIC/ASSP and embedded market. In November 2013, one of the devices was first shipped with the support of Vivado and UltraFast, the only SoC-enhanced design suite, providing performance advantages comparable to ASIC.

In addition, Salings announced a new record. As one of the UltraScale product lines, the Virtex VU440 UltraScale device launched by Selins doubles the capacity of the largest device in the industry to 4.4 million logical units, increasing the device density advantage of Selins from 2 times of 28 nm to 4 times of 20 nm, exceeding all other programmable devices, according to Tang Liren, vice president of Xilinx Global and CEO of Asia-Pacific Region. Device.

Tang Liren said that ASIC UltraScale architecture has obvious advantages in wiring, clock distribution similar to ASIC, increasing CLB logic and important module level innovation for critical path optimization. It can not only solve the limitations of system throughput expansion and delay, but also directly break through the first system performance bottleneck on advanced nodes, i.e. interconnection. These enhancements can satisfy customers'requirements for higher performance design in massive data stream, I/O bandwidth, real-time data package, DSP and image processing.

"Cyrus will also introduce Virtex UltraScale devices using TSMC 16nm FinFET technology to further enhance system integration and system-level unit power performance to meet high-end FPGA requirements." Tang Liren pointed out that the future planning of Salings can be described as "win" step by step.

The successful UltraScale device is not a "one-man-in-the-battle" device. Salings also defines an All Programmable design method, UlstraScale design method. This method covers best practices and a series of project schedules for project planning, development board layout and device planning. It can also meet many challenges such as design creation, implementation and configuration debugging. "The unification of UlstraScale ASIC-level architecture, Vivado design tools and UlstraFast design methods realizes the advantages of ASIC-level." Tang Liren pointed out.

Accelerating vertical and horizontal integration in the future

With the help of horizontal integration and vertical innovation, large factories of FPGA will accelerate integration and form products with more powerful functions.

It can be said that the FPGA "sparrows are small, but they have all five organs". With the dual drive of product upgrading and application requirements, the future of FPGA will continue to develop in the following directions: first, high density, high speed, broadband, second, low voltage, low power consumption, third, low cost, fourth, system integration, fifth, dynamic reconfiguration and single-chip cluster. These development directions are not mutually exclusive, or even go hand in hand. With the help of horizontal integration and vertical innovation, the FPGA factory will accelerate the integration of the characteristics of the above development directions to form more powerful products.

"There are many opportunities for innovation in vertical innovation. In addition to increasing modular IC, more functions can be added. In the future, Altera may even use Enpirion's power technology to integrate power modules into the internal of the FPGA, thus simplifying the development process of the FPGA system. Mark Davidson said, "In addition, horizontal innovation is needed as well as vertical innovation, because power design is becoming more and more difficult nowadays. Power design should be taken into account when designing a FPGA, or when designing a power supply, it should also take into account the design of a FPGA. Altera will also continue to strengthen innovation in both vertical and horizontal aspects."

And these innovations have to rely on the power of "software platform" to put them into practice, because the time and cost of putting the FPGA on the market largely depends on how developers use tools to solve the new generation of complex problems. From FPGA to All Programmalbe, from single process node to multi-process coexistence, three product lines (FPGA, SoC, 3D IC) have developed together, and the complexity of the system has increased dozens of times, but the development work needs to be completed in the same time or even shorter time. Software development platform is becoming more and more important. The UlstraScale design method, a set of all Programmable design methods defined by Salings, is a timely move. Because of Salings'efforts on the software tool platform, it is possible for the hardware and software co-design based on the product of FPGA to stimulate the unlimited release of the potential of the FPGA.